Appeal No. 1999-1116
Application No. 08/635,170
BACKGROUND
The invention is directed to a process for preventing sequencer overrun, which is an
error condition in a disk controller. Claim 1 is reproduced below.
1. A sequencer overrun prevention method, comprising the steps of:
initializing a sequencer;
reading a timer value indicating when said sequencer begins operation;
calculating a sequencer halting point by adding a predetermined time
constant to said timer value;
determining whether said sequencer operates at said sequencer halting
point; and
forcibly halting said sequencer when said sequencer operates at said
sequencer halting point.
The examiner relies on the following reference:
Machado et al. (Machado) 5,517,631 May 14, 1996
(filed Jul. 7, 1993)
Claims 1-14 stand rejected under 35 U.S.C. § 102 as being anticipated by
Machado.
We refer to the Final Rejection (mailed Dec. 12, 1997) and the Examiner's Answer
(mailed Sep. 1, 1998) for a statement of the examiner's position and to the Brief (filed June
15, 1998) and the Reply Brief (filed Oct. 29, 1998) for appellant's position with respect to
the claims which stand rejected.
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