Appeal No. 1999-1576
Application No. 08/347,527
isolation (brief, page 8; column 1, lines 43 through 51; and
column 3, lines 13 through 18); Jastrzebski discloses “a method
of forming a CMOS FET structure by forming an apertured
insulating layer on a silicon substrate” and forming first and
second monocrystalline silicon islands of opposite conductivity
types adjacent to each other (brief, pages 8 and 9); and
Jastrzebski “distinguishes his invention from both trench
isolation technologies and SOI technologies” (brief, page 9;
column 1, line 32 through column 2, line 36). We likewise agree
with the appellant’s conclusion (brief, page 9) that:
In the present instance, the cited references
clearly lead away from each other. Absent the
impermissible use of hindsight reconstruction based on
applicant’s own disclosure, one skilled in the art
would find no suggestion to combine them.
Even if we assume for the sake of argument that the references
could somehow be combined, the claimed invention still would not
be met by the combined teachings. Thus, the 35 U.S.C. § 103(a)
rejection of claims 15 and 18 through 36 is reversed.
DECISION
The decision of the examiner rejecting claims 15 and 18
through 36 under 35 U.S.C. § 103(a) is reversed.
REVERSED
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