Appeal No. 1999-1850
Application No. 08/870,406
Turning now, to the rejections based on prior art, we will sustain these rejections.
With regard to the rejection of claims 1, 2, 6 and 7 under 35 U.S.C. 102(b), the examiner
contends that this claimed subject matter is anticipated by Izuhara and applies Izuhara to the
instant claims as follows:
The examiner makes reference to Figure 12 of Izuhara and notes that transistors Q50 and Q51
comprise a common emitter cell while transistors Q52, Q52N, Q53 and Q53N comprise a
common base cell. The claimed subcells read on the transistors of the common emitter and
common base cells identified by the examiner in Izuhara. The examiner notes that the claim
preambles have not been taken into account since they do not breathe life and meaning into the
claims.
It appears to us that the examiner has established a prima facie case of anticipation in the
application of Figure 12 of Izuhara to instant claims 1, 2, 6 and 7.
Appellants argue, first, that Izuhara teaches an analog-to-digital converter. This is irrelevant
so long as the instant claims are anticipated by something disclosed within Izuhara.
Appellants agree that Izuhara contains transistors arranged in cells (brief-bottom of page 10).
However, appellants contend that the examiner has failed to point out that the interconnection of
the emitters and bases within each cell are not as claimed by appellants. The examiner has
identified the common emitter cell as comprising transistors Q50 and Q51 and the common base
cell as comprising transistors Q52, Q52N, Q53 and Q53N. Clearly, each of the transistors in
Figure 12 of Izuhara comprises an emitter, a collector and a base. Further, the collector (of Q50,
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