Appeal No. 1999-1855
Application 08/738,916
This is a decision on appeal under 35 U.S.C. § 134 from
the final rejection of claims 8-10, 21, and 23. Claims 1-3,
7, 11-18, 20, and 22 have been canceled. Claims 4-6 and 19
are allowed.
We affirm-in-part.
BACKGROUND
The disclosed invention is directed to a voltage
generator that is capable of generating negative voltage
pulses using standard CMOS transistor switches that are formed
directly in a p-type substrate or in n-wells that are formed
in the p-type substrate (n-well CMOS process), as opposed to
in an n-type substrate or p-wells in the n-type substrate
(p-well CMOS process).
Claim 8 is reproduced below.
8. A low-voltage, semiconductor drive circuit
comprising:
a p-channel drive transistor having a source
connected to a positive voltage source and a drain
providing a drive output; and
a voltage generator switchably providing a negative
voltage to a gate of said p-channel transistor;
wherein said voltage generator is fabricated using
p-channel enhancement mode transistors formed in n-type
wells in a grounded p-type substrate and n-channel
- 2 -
Page: Previous 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Next
Last modified: November 3, 2007