Appeal No. 2000-1483
Application No. 08/851,608
said second location." Thus, there must be a certain combination
of the relative distances dtr, dmax, and d such that this
limitation will occur. Since no such specific relationship is
disclosed by Tonnel, it cannot be said, with certainty, that this
limitation, i.e., wherein breakdown in said trench DMOS
transistor occurs across said epitaxial layer at a position
closer to said first location than said second location, will
inherently occur in Tonnel.
This is made more specific in claims such as claim 20,
wherein dtr is less than dmax "by an amount sufficient to cause
semiconductor surface breakdown to occur at a location closer to
said first location than to said second location," or claim 21
which specifies the thickness of the epitaxial layer so as "to
cause semiconductor surface breakdown to occur at a location
closer to said first location than said second location."
Accordingly, we will not sustain the rejection of claim 17,
or of claims 18-21 and 25-29, dependent thereon, under 35 U.S.C.
§ 103.
Similarly, independent claim 30 sets forth a spatial
relationship of depths d1 and d2 and recites, "wherein junction
breakdown occurs away from the trench and into a portion of the
second covering layer." Since there is no evidence that Tonnel,
-8-
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