Appeal No. 2000-1939
Application 08/791,281
switches SW1 and SW2 and a second switched capacitor C3 connected
between switches SW3 and SW4, the switches being controlled by
the waveforms shown in Figure 2:
Du
ri
ng
th
e overlapping portions of
clocking pulses F1 and F1a, switches SW1-SW4 are in the positions
shown in Figure 1, in which capacitor C3, for example, is
connected between VIN and ground. During the overlapping
portions of clocking pulses F2 and F2a, capacitor C3 will be
connected between the negative amplifier input terminal and
ground. As shown in Figure 3, reproduced below, switch SW3
consists of transistors M1 and M2 and switch SW4 consists of
-2-
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Last modified: November 3, 2007