Appeal No. 2001-0607
Application No. 09/244,429
The examiner apparently relies on Yoshimi for a suggestion
of the claimed thickness but it is not clear as to on what,
exactly, in Yoshimi the examiner is relying. After arguing that
every patent is presumed valid, in response to appellants’
argument that Yoshimi is not enabling, the examiner states:
Thicknesses within range as stated by Yoshimi...are
used through out the specification for other layers
and, therefore, it is reasonable to assume one of
ordinary skill in the art can obtain such thicknesses for
the gate electrode [answer-page 7].
At page 8 of the answer, the examiner indicates that Yoshimi
discloses a range of thicknesses between 15 and 3000 Angstroms.
Although the examiner does not identify the portion of Yoshimi
relied upon, it is clear that the examiner is citing column 1,
lines 37-39, of the reference. This portion of the reference,
describing the prior art to Yoshimi, calls for a second
polysilicon layer to be 15-3000 Angstroms thick over the entire
surface of an interlayer insulator 14 which has been grown by
thermal oxidation over a floating gate pattern 13 on a gate oxide
12 which is on a substrate 8. A “resist pattern 16 is formed on
the second polysilicon layer 15 to define a control gate 17, as
shown in Figure 21.” While Figure 21 does not show the control
gate 17, it can be seen in Figure 23, where the control gate 17
-6–
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