Appeal No. 2001-2037
Application No. 08/884,912
35 U.S.C. 103. As evidence of obviousness, the examiner cites
Young and Song with regard to claims 10, 12, 13, 15 and 18-22,
adding Ventkatesan with regard to claim 16.
Reference is made to the brief and answer for the respective
positions of appellants and the examiner.
OPINION
Turning first to the rejection under 35 U.S.C. 102(b), the
examiner relies on Figures 3 and 9 of Subbanna. Subbanna teaches
the formation of a MOS transistor wherein a gate electrode (N+)
is formed on a gate dielectric layer (see the oxide layer under
the gate) formed on a first surface of a substrate 31. An
isolation region is formed (see oxide layers on either side of
Subbanna’s Figure 9) and the top surface of the isolation region
extends less than 1500 Angstroms (because 0 is clearly less than
1500 Angstroms) above the first surface of the substrate. As
shown in Figure 9 of Subbanna, there are a pair of recesses
formed on opposite sides of the gate electrode, wherein the
recesses extend the first substrate surface, as claimed.
Moreover, a silicide layer WSi is formed in the pair of recesses
-3–
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