Appeal No. 2001-2037
Application No. 08/884,912
12 is removed from over the silicon layer (column 3, lines 5-6)
and the silicon layer is doped. A silicide of second thickness
is formed on the doped silicon layer (19) and on the substrate
adjacent to the outside edges of the spacers (18). It is clear
from Figure 2I of Song that the first height (of the spacers 13)
is greater than the sum of the first thickness (of the silicon
layer) and the second thickness (of 18, 19).
While Song, alone, meets the limitations of independent
claim 10, we will sustain the rejection of claims 10, 12, 13, 15
and 18-22 under 35 U.S.C. 103 since anticipation is the epitome
of obviousness. In re Fracalossi, 681 F.2d 792, 215 USPQ 569
(CCPA 1982). Lack of novelty is the ultimate of obviousness. In
re Pearson, 494 F.2d 1399, 181 USPQ 641 (1974).
Turning to the rejection of claim 16, this claim adds the
limitation of polishing the silicon layer prior to forming the
sacrificial layer. The examiner cites Venkatesan for a
chemical/mechanical polishing process to form a gate electrode 36
and contends that it would have been obvious to modify Young’s
process by including a polishing step because “it would
selectively removed [sic, remove] a part of the silicon layer for
forming a planar surface and would avoid misaligning” [answer-
page 6].
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