Appeal No. 2002-0974
Application 09/332,745
rejection before us and the scope of claim 1. Asayama et al.
discloses both the nature of the epitaxial layer and the wafer
and the rejection is, again, over the combined disclosures of
Asayama et al., Inoue et al. and Nakagawa et al. Further, claim 1
is not limited to a single crystal substrate and claim 1 does not
set forth any particular epitaxial layer. Also, as a "comprising"
claim, claim 1 does not exclude Inoue et al.'s steps of
increasing and decreasing the temperature in their process.
We find that when the prior art is considered in light of
the level of skill possessed by the semiconductor manufacturing
engineer it fairly suggests the claimed process. We consider that
the examiner has provided evidence in the nature of the prior art
on which he has relied which establishes that the claimed subject
matter would have been prima facie obvious at the time appellants
made their invention. Accordingly, we find absolutely no merit in
appellants' argument that the examiner has impermissibly relied
on appellants' disclosure as a guide for combining the proffered
prior art. Appellants perform the same steps as Asayama et al.
and for the same reason. Conducting the process of Asayama et al.
in the manner suggested by Inoue et al. to increase the cooling
rate and in a single reaction chamber as disclosed by Nakagawa et
al. for process efficiency and economics would have been obvious
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