Appeal No. 2002-1183
Application 08/975,549
improperly contained in the reply brief rather than a separate
paper (see 37 CFR § 1.4(c)), the request/petition should have
been directed to the Commissioner, i.e., the Director, rather
than to this Board. We have no jurisdiction to entertain this
matter.
II. The merits
Littlebury discloses a method for assembling, testing and
packaging integrated circuits. As described by Littlebury with
reference to the flow chart depicted in the drawing figure,
. . . [t]he assembly and test process begins with
whole semiconductor wafers which have completed front-
end processing. Front-end processing comprises
diffusion, photolithography, and metallization
processes, while back-end processing refers to
packaging, testing, and burning-in the integrated
circuits. A first step in the assembly process is
burn-in 1 of the integrated circuits. . . .
Preferably, during burn-in 1 the ICs are
functionally tested for a first time as indicated by
box 2 in the figure. A failure map is produced to
record the location of devices which failed during
burn-in 1. . . . [A]ny ICs which are not properly
burned-in will not be packaged or shipped to a
customer. Although the ICs will be tested again later
in the assembly process before packaging, only
functional test 2, when performed during burn-in, can
ensure that burn-in has actually been performed.
A mount and saw process 3 is the next step after
the first functional test 2 is done. The wafers are
mounted on a supporting film and sawed to separate the
individual integrated circuits from each other. . . .
Parametric test 4 is now performed. . . .
Parametric testing 4 is different from functional
testing 2 in that parametric testing 4 measures
important parameters such as operating speed. In
3
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