Ex Parte YAMASHITA - Page 2



          Appeal No. 1999-2691                                                        
          Application No. 08/590,348                                                  

               a sample-and-hold circuit for sampling and holding said image          
          data signal for a predetermined output period;                              
               an A/D converter for converting an analog signal outputted by          
          said sample-and-hold circuit corresponding to a held image data             
          signal into a digital signal;                                               
               a reference signal generator for generating a reference                
          signal;                                                                     
               a timing generator for generating a read timing signal which           
          is used to read out image data from the image sensor for a                  
          predetermined reading period and a hold timing signal which                 
          controls hold timing of the sample-and-hold circuit according to            
          said reference signal; and                                                  
               an A/D conversion timing generator for generating a conversion         
          timing signal according to said reference signal for controlling            
          operation of said A/D converter;                                            
               wherein said timing generator changes either said read timing          
          signal or said hold timing signal so that the same data from the            
          starting point of the output of the image data is held, when                
          changing the output period of the image data for image enlargement          
          or reduction processing.                                                    
          7.  An image signal processing apparatus, comprising:                       
               an image sensor for reading an image and outputting image data         
          representing the read image as an image data signal;                        
               a sample-and-hold circuit for sampling and holding said image          
          data signal;                                                                
               an A/D converter for converting an analog signal outputted by          
          said sample-and-hold circuit corresponding to a held image data             
          signal into a digital signal; and                                           
               means for preventing said A/D converter from inputting said            
          analog signal at the same time that said analog signal changes its          
          value.                                                                      

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