Ex Parte WHITE et al - Page 4




          Appeal No. 2001-2610                                                        
          Application No. 09/052,247                                                  


               Taking claim 1, as exemplary, the examiner points to column            
          8, lines 47-49, of Mahalingaiah as a teaching of determining if a           
          fetched instruction is an instruction-path-changing instruction             
          because the prefetch/predecode unit determines the branch target            
          of a line being predecoded.  The examiner points to column 8,               
          lines 65-67, of the reference for a teaching of if the                      
          instruction is not path-changing, then prefetching a next                   
          sequential instruction, because the cited portion discloses a               
          branch direction being “taken,” in which subsequent instructions            
          are fetched from the target address of the branch instruction,              
          wherein the target address of a branch instruction is known to be           
          beyond the next sequential address.                                         
               Appellants contend that there is nothing in Mahalingaiah               
          that teaches determining if a fetched instruction is an                     
          instruction-path-changing instruction in which an instruction-              
          path-changing instruction branches beyond the next sequential               
          instruction set.  Further, contend appellants, the examiner has             
          identified no teaching in the reference disclosing that the                 
          target branch of a branch instruction is known to be beyond the             
          next sequential address and there is no reason for the target               
          address of a branch instruction to necessarily be beyond the next           
          sequential address in a cache line [principal brief-page 6].                

                                         -4–                                          





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