Appeal No. 2001-2610
Application No. 09/052,247
instruction which may, itself, direct a branch to be taken if the
branch target is beyond the next sequential instruction),
branches beyond said “next sequential preselected instruction
set” so it is unclear how the branch taken in Mahalingaiah is
directed to the prefetching of a next sequential instruction if
the instruction is not an instruction-path-changing instruction.
With regard to claim 27, this claim specifically recites the
prefetching of “a next sequential instruction set...in response
to said predecode bits.” The examiner relies on column 7, lines
63-65, of Mahalingaiah for this teaching. That portion of the
reference recites that the “predecode bits form tags indicative
of the boundaries of each instruction.” While this may designate
the range of desired data values to be accessed, as alleged by
the examiner [answer-page 9], it indicates nothing about
prefetching a next sequential set “in response to” predecode
bits, as required by the instant claim language. Accordingly,
since the examiner has not shown how, or where, every claim
limitation is shown in the reference, we will not sustain the
rejection of claim 27 under 35 U.S.C. 102(e).
-8–
Page: Previous 1 2 3 4 5 6 7 8 9 10 Next
Last modified: November 3, 2007