Appeal No. 2002-1594
Application No. 09/057,573
BACKGROUND
The invention is directed to qualification of signals in an optical disc apparatus, in
particular suppressing system response to any effects of DC component variation.
Claim 7 is reproduced below.
7. An apparatus for the qualification of a signal comprising:
a phase locked loop synchronizer, said phase locked loop synchronizer
producing phase error signals in response to an analog signal input, said phase
locked loop synchronizer further adjusting a signal slice level in response to said
analog signal from a jitter feedback slicer, said jitter feedback slicer responding
to said phase error signals to one of increase or decrease a voltage of said
analog signal input to compensate for a change in said signal slice level from
said jitter feedback slicer.
The examiner relies on the following references:
Saiki et al. (Saiki) 5,467,331 Nov. 14, 1995
Kawashima et al. (Kawashima) 5,966,356 Oct. 12, 1999
(filed Nov. 7, 1997)
Claims 1-3 and 7-9 stand rejected under 35 U.S.C. § 103 as being unpatentable
over Kawashima and Saiki.
We refer to the Final Rejection (Paper No. 11) and the Examiner’s Answer
(Paper No. 18) for a statement of the examiner’s position and to the Brief (Paper No.
16) for appellants’ position with respect to the claims which stand rejected.
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