Ex Parte ANDRICACOS et al - Page 5




               Appeal No. 2003-0623                                                                                              
               Application No. 09/348,632                                                                                        


               in the specification as originally filed.  Id.  It then follows that the use of the terminology                   
               “polarizing” in the appealed claims does not violate the requirements of the first and second                     
               paragraphs of 35 U.S.C. § 112.                                                                                    
                      We also reverse the examiner Sections 102 and 103 rejections for essentially those reasons                 
               set forth at pages 6 through 24 of the Brief.  We only add that the examiner, on this record, has not             
               demonstrated that the deposition methods disclosed in the applied prior art references are useful for             
               depositing a particular conductive material in recesses for submicron lines or submicron vias to                  
               advantageously obtain an interconnect structure on an electronic device with void-free seamless                   
               submicron conductors.  This is especially true in this case since Poris, one of the prior art                     
               references relied upon by the examiner, teaches away from using the claimed deposition method to                  
               form void-free seamless submicron conductors as indicated by the appellants.  See also, Poris,                    
               Figure 1A, together with Poris, column 4, lines 49-62.  It then follows that one of ordinary skill in             
               the art would not have readily envisaged, or would not have been led to use, the claimed deposition               
               method (inclusive of, e.g., the types of the electroplating bath compositions and conditions capable              
               of providing void-free seamless submicron conductors not recognized by the applied prior art                      
               references) to form the claimed interconnect structure on an electronic device within the meaning                 
               of 35 U.S.C. § § 102 and 103.                                                                                     





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