Appeal No. 1999-0288
Application No. 08/538,071 Page 16
to lack this limitation as well. With respect to the examiner's
position, we observe that independent claim 8, like independent
claim 6, similarly recites determining the logic levels for at
least one bit of a machine state register and determining the
logic levels for a bit set of a second MMCR. Independent claim
17 similarly recites a plurality of MMCRs as well as the set of
logic conditions including a chosen logic level for a performance
monitor bit of a machine state register to mark a specific
process for counting. Independent claim 22 similarly recites
determining a logic level for at least one bit of a machine state
register and determining logic levels for a second bit of a
second MMCR. Independent claim 31 similarly recites the set of
logic conditions including a chosen logic level for a performance
monitor bit of a machine state register to mark a specific
process for counting. Independent claim 36 similarly recites
controlling counting upon the selected event being associated
with a specific process and for triggering counting when the
selected event is matched based upon a logic level of a bit
within a machine state register within the processing system.
Independent claim 37 similarly recites controlling counting based
upon the effective address being associated with a specific
process and for triggering counting when the effective address is
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