Appeal No. 2002-2086
Application 09/010,396
consideration of the delay contributions from driver pin 110 to
sink 124 and from driver pin 110 to sink 122. The examiner's
reliance on the calculation of interconnect delay for the
critical path of Li does not support the finding. The critical
path is a single path through the circuit, e.g., part of the
critical path could be "between driver pin 108 and input pin 116
[in Fig. 9]" (col. 11, lines 56-57). Li states (col. 6,
lines 30-34):
The path delay is calculated by determining the sum of the
delays DS through each segment of the path. A segment
typically includes one of the components of the circuit and
the net which couples an output of the component to one or
more inputs of components.
The segments are along the critical path, e.g., from driver 108
to sink 116 in Fig. 9, and do not include the delay of
non-critical path segments, e.g., from driver 108 to sink 122 or
sink 124, as stated by the examiner.
Nevertheless, the broad language of the claims appears to
read on Li. We look at the delays for one segment, i.e., between
two components, explained at column 2, lines 34-61, and column 6,
lines 39-50; this delay is the claimed "interconnect delay,
defined as a delay for an interconnect between a driver and a
sink in a placement of cells." The segment delay DS is for the
segment in the critical path, e.g., from driver 108 to sink 116.
The limitation of "a first delay that accounts for a contribution
of a direct path between the driver and the sink" appears to read
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