Ex Parte PETRANOVIC et al - Page 8




          Appeal No. 2002-2086                                                        
          Application 09/010,396                                                      

          Delay as a Bound for RC Trees with Generalized Input Signals,               
          IEEE Trans. on Computer-Aided Design of Integrated Circuits and             
          Systems, Vol 16, No. 1, January 1997, p. 96 (discussing Rki); L.            
          van Ginneken, Buffer Placement in Distributed RC-tree Networks              
          for Minimal Elmore Delay, IEEE Int'l Symposium on Circuits and              
          Systems, Vol. 2, May 1990, p. 866 (discussing Rki) (both                    
          references of record).  If this is not the meaning intended by              
          appellants, it must be shown what meaning would be given by one             
          of ordinary skill in the art.  The min-cut algorithm of Li has              
          nothing whatsoever to do with overlapping wires even under the              
          examiner's interpretation.  Accordingly, we conclude that the               
          examiner has failed to establish a prima facie case of                      
          obviousness.  The rejection of claims 23-26 is reversed.                    


          Requirement                                                                 
               In any further prosecution, either by request for rehearing            
          or by further prosecution before the examiner, in addition to               
          explaining how the claims define over Li, appellants are required           
          to explain how the limitations, "wherein calculation of the                 
          interconnect delay comprises determining a first delay that                 
          accounts for a contribution of a direct path between the driver             
          and the sink and determining a second delay that accounts for a             
          contribution of a portion of the net that does not include the              
          direct path to the interconnect delay" (claim 1) and "wherein               

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