Appeal No. 2003-1281
Application No. 08/991,232
single integrated circuit chip” (claim 9).
The examiner contends (answer, page 8) that:
It’s understood that a single integrated circuit chip
as presently claimed, a circuit having a
microcontroller, a programmable circuit, a memory
array, a first bus and second bus are fabricated as a
single integrated circuit chip just as Zavracky’s
processor chip having microprocessor, programmable
logic array, [and] memory array. Each of the units
communicate with each other by its own buses in the
vertical direction and all of them are stacked together
and fabricated as a multiple-layers processor chip. A
processor chip having [a] plurality of layers still is
a single chip or a single integrated circuit chip as
claimed “a single integrated circuit chip” as Appellant
argues . . . .”
By the examiner’s own admission, the circuit structure in
Zavracky (Figure 13) is “stacked together and fabricated as a
multiple-layers processor chip.” Such a multi-layered structure
is not fabricated as a “single integrated circuit” chip as
required by claims 1 and 21 because the microprocessor 804 and
806 and the memory array 808 are stacked as separate layers on
the already fabricated “single integrated circuit chip.” Stated
differently, the programmable logic circuit 802 is the only
circuit structure “fabricated as a single integrated circuit
chip.” Thus, the anticipation rejection of claims 1 and 21 is
reversed because Zavracky does not disclose all of the
limitations of these claims. Glaxo Inc. v. Novopharm Ltd., 52
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