Appeal No. 2003-1281
Application No. 08/991,232
art to combine the teachings of the references, we additionally
find that Narasimhan does not cure the noted shortcoming in the
teachings of Zavracky (claims 2 through 8 and 11 through 20), and
does not disclose a programmable logic circuit “selected from the
group consisting of: a complex programmable logic device (CPLD)
and a programmable logic array (PLA)” (claim 10). In summary,
the obviousness rejection of claims 2 through 8 and 10 through 20
is reversed.
DECISION
The decision of the examiner rejecting claims 1, 9 and 21
under 35 U.S.C. § 102(e) is affirmed as to claim 9, and is
reversed as to claims 1 and 21. The decision of the examiner
rejecting claims 2 through 8 and 10 through 20 under 35 U.S.C.
§ 103(a) is reversed. Accordingly, the decision of the examiner
is affirmed-in-part.
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