Appeal No. 2003-1965
Application 09/275,496
clock intervals. See page 23 of Appellant’s specification.
Independent claims 1 and 20 are representative of the
Appellant’s claimed invention and is reproduced as follows:
1. A system for receiving packets of serial data in
relation to a system clock having a preselected frequency,
comprising:
a mechanism for sampling each data packet at n clock
intervals, wherein each of the n clock intervals is phase shifted
in relation to the system clock, and wherein one of the n clock
intervals is a preferred interval, and the remaining clock
intervals are neighboring intervals; and
a mechanism for comparing the data packet sampled at the
preferred interval with the data packet sampled at each of the
neighboring intervals.
20. A receiver comprising:
a system clock;
a plurality of history buffers for receiving common data and
each clocked by one of a plurality of sample clocks spaced at
preselected regular intervals in relation to the system clock;
a monitoring means for monitoring a time relationship
between common data received at the history buffers and the
system clock;
a determining means for determining which one of the
plurality of history buffers receives the common data in a most
optimal time relationship with the system clock; and
an output means for selectively outputting the common data
from one of the history buffers determined by the determining
means to be receiving the common data in the most optimal time
relationship with the system clock.
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