Appeal No. 2005-0001
Application No. 09/268,902
the dimensions of a grid that is placed on a surface, and insure that the
grid is within the boundaries of the surface, the dimensions of the surface
must be known. The Examiner also maintains that motivation lies in the
Huddleston reference itself because by first requiring that the user input
core/die dimensions on which the mapping is to be constructed, the
combination would have insured correct placement of the components on
the device without allowing an increase in the crucial parameters of the
final core/die size (Huddleston et al., column 1, lines 20-24 and column 1,
line 53 to column 2, line 5).
As stated supra, we find Huddleston’s teaching that data concerning the
design of an integrated circuit core be in response to a prompt to be cumulative
of the teachings of Mitsuhashi and we find that the other limitations of claim 1
which appellant argues differentiate claim 1 from Mitsuhashi, are taught by
Mitsuhashi. Thus, regardless of whether the examiner’s rejection provides
proper motivation to combine Mitsuhashi and Huddleston or not, we will sustain
the examiner’s rejection as appellant’s arguments have not shown a limitation of
representative claim 1 that Mitsuhashi does not teach. In affirming a multiple
reference rejection under 35 U.S.C. § 103, the Board may rely on one reference
alone in an obviousness rationale without designating it as a new ground of
rejection. In re Bush, 296 F.2d 491, 496, 131 USPQ 263, 266-67 (CCPA 1961);
In re Boyer, 363 F.2d 455, 458, n.2, 150 USPQ 441, 444, n.2 (CCPA 1966) .
However, an anticipation rationale may constitute a new ground of rejection. In
re Meyer, 599 F.2d 1026, 1031, 202 USPQ 175, 179 (CCPA 1979); In re Echerd
471 F.2d 632, 635, 176 USPQ 321, 323 (CCPA 1973).
Nonetheless, we find that the examiner, with the motivation provided, has
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