Appeal No. 2005-0001
Application No. 09/268,902
On page 10 of the answer, the examiner states:
Murakata teaches an automatic cell-layout arranging method and
apparatus for polycell logic LSI comprising receiving data input including
data representing the types of polycells to be arranged on the chip
substrate, to form a polycell LSI having the function desired by the user,
data specifying the wiring prohibited regions and wiring-permitted regions
of each of the arrays (i.e. power zones), data requesting that the required
specific polycells be connected, and data showing an object function
required (column 4, lines 56-68).
It would have been obvious … to modify… the invention of
Murakata and Huddleston … because Murakata suggests that the
combination would have provided the conventional practice of indicating
wiring prohibited regions for each layer of the wiring lines.
We disagree. Claim 45 includes the limitation “wherein accepting
information for at least one power zone comprises prohibiting wire segments in a
metal layer of at least one of said power zone.” While, we concur that Murakata
teaches a cell layout method where there are wiring prohibit zones. We do not
find that Murakata teaches that the wiring prohibit zones applies to the power-
bus-grid, or that the sectional regions of Mitsuhashi (as discussed supra meet the
claimed power zones) should contain a wiring prohibit zone. Accordingly, we will
not sustain the examiner’s rejection of claim 45.
Conclusion
Only those arguments actually made by appellant have been considered
in this decision. Arguments which appellant could have made but chose not to
make in the brief or by filing a reply brief have not been considered and are
deemed waived by appellant [see 37 CFR § 41.37]. Support for this rule has
been demonstrated by our reviewing court in In re Berger, 279 F.3d 975, 984, 61
USPQ2d 1523, 1528-1529 (Fed. Cir. 2002) wherein the Federal Circuit stated
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