Appeal No. 2006-1049
Application No. 09/667,826
have capacitances of 2NC0, respectively, where C0 is a fixed capacitance and N is a
nonnegative integer.
15. An infrared imaging system as set out in claim 14, wherein there are four
capacitors having respective capacitances of C0, 2C0, 4C0 and 8C0.
16. An infrared imaging system as set out in claim 8, wherein said current
sources provide substantially constant currents of 2NI0, respectively, when coupled
into said readout circuit by said means for connecting, where I0 is a fixed current
value and N is a nonnegative integer.
17. An infrared imaging system as set out in claim 16, wherein there are four
constant current sources providing substantially constant currents of I0, 2I0, 4I0 and
8I0.
18. An infrared imaging system as set out in claim 2, further comprising
timing means for providing focal plane timing signals to said readout circuit.
19. An infrared imaging system as set out in claim 18, wherein said readout
circuit further comprises offset correction logic means for controlling the means
for correcting in response to said timing signals provided from the timing means.
20. An infrared imaging system as set out in claim 19, wherein said offset
correction logic means receives said offset correction values from said means for
storing and provide them to said means for correcting in response to said timing
signals.
21. An infrared imaging system as set out in claim 2, further comprising
means, coupled to said output means, for analog to digital converting the corrected
detection signals and providing corresponding image data for each detector
element.
22. An infrared imaging system as set out in claim 21, further comprising a
memory for temporarily storing image data corresponding to all the detector
elements of the array.
23. An infrared imaging system as set out in claim 1, wherein said readout
circuit comprises a plurality of readout cells in number to the plurality of detector
elements and wherein said means for correcting comprises an offset correction
circuit in each readout cell of the readout circuit.
24. An infrared imaging system as set out in claim 23, wherein each offset
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Last modified: November 3, 2007