Appeal No. 2006-1049
Application No. 09/667,826
3. An infrared imaging system as set out in claim 2, wherein said capacitors
have capacitances of 2NC0, respectively, where C0 is a fixed capacitance and N is a
nonnegative integer.
4. An infrared imaging system as set out in claim 3, wherein there are four
capacitors having respective capacitances of C0, 2C0, 4C0 and 8C0.
5. An infrared imaging system as set out in claim 1, wherein said means for
selectively connecting comprises a plurality of switches, equal in number to said
plurality of parallel connected circuit elements and connected in series therewith.
6. An infrared imaging system as set out in claim 1, wherein said offset
correction values are binary values and wherein said means for storing comprises a
digital memory.
7. An infrared imaging system as set out in claim 6, wherein said digital
memory stores a separate binary offset correction value for each detector element
in the array.
8. An infrared imaging system as set out in claim 1, wherein said plurality of
detector elements are arranged in a plurality of rows and columns and wherein said
means for correcting comprises a separate offset correction circuit for each column
and wherein said means for providing said offset correction values provides said
offset correction values in a time multiplexed manner to said means for correcting.
9. An infrared imaging system as set out in claim 1, wherein said plurality of
parallel connected circuit elements comprise a plurality of constant current sources.
10. An infrared imaging system as set out in claim 9, wherein said current
sources provide substantially constant currents of 2NI0, respectively, when coupled
into said readout circuit by said means for selectively connecting, where I0 is a
fixed current value and N is a nonnegative integer.
11. An infrared imaging system as set out in claim 10, wherein there are four
constant current sources providing substantially constant currents of I0, 2I0, 4I0 and
8I0.
12. An infrared imaging system as set out in claim 1, wherein said array of
detector elements and said readout circuit are formed as a single monolithic
integrated circuit chip.
13. An infrared imaging system as set out in claim 1, wherein said plurality
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