Ex Parte Cannata et al - Page 65



           Appeal No. 2006-1049                                                                     
           Application No. 09/667,826                                                               

           circuit further comprises a feedback capacitor coupled between the output of the         
           differential amplifier and said first input thereof.                                     
                 33. An infrared focal plane array as set out in claim 32, wherein said readout     
           circuit further comprises a switch coupled between and parallel with said feedback       
           capacitor between the output of the differential amplifier and the first input thereof.  
                 34. An infrared focal plane array as set out in claim 27 wherein said plurality    
           of detector elements and said readout circuit are formed as a single monolithic          
           integrated circuit wherein said readout circuit acts as a substrate for said detector    
           elements.                                                                                
                 35. An infrared focal plane array, comprising:                                     
                 a plurality of detector elements configured in a two dimensional array; and        
                 a readout circuit electrically coupled to said plurality of detector elements      
           and structurally integrated therewith, said readout circuit comprising:                  
                 a sample and hold capacitor;                                                       
                 means for biasing the detector elements so as to provide an analog detection       
           signal from each detector element corresponding to the infrared radiation incident       
           thereon, wherein the analog detection signal is a voltage signal provided at a           
           sample node coupled to the sample and hold capacitor; and                                
                 means for correcting the analog detection signal from each detector element        
           by a discrete offset correction and providing a corrected analog detection signal,       
           wherein the discrete offset correction varies from detector element to detector          
           element and comprises an offset correction voltage added to, or subtracted from,         
           the voltage signal, wherein said means for correcting subtracts or adds a variable       
           amount of charge from said sample and hold capacitor to provide a corrected              
           voltage signal at said sample node, and wherein said means for correcting                
           comprises a plurality of parallel connected constant current sources connected           
           between said sample node and a reference voltage and a plurality of switches             
           corresponding to said plurality of constant current sources and respectively             
           coupled in series therewith.                                                             



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