Appeal No. 2006-1303
Application No. 10/000,667
provide for the interleaving of instructions from the same instruction set, as provided by the
instant claims.
The instant claims are very clear about this not only in reciting a set (i.e., a single set) of
instructions, but also in the specific recitation of “a set of logically successive instructions”
(emphasis added). As appellant has pointed out (brief-page 6), the interleaved instructions of
Davis may be in a sequence, but they are merely in a temporal relationship, in that first one
instruction is addressed and then another instruction, from a separate instruction set, is addressed.
The interleaved instructions in Davis are not “logically successive” because an instruction
addressed in memory bank 220 is not in the same instruction set as, and therefore
has no logical connection to, the subsequently addressed instruction from memory bank 230.
Therefore, Davis does not disclose or suggest the claimed “set of logically successive
instructions” wherein a first memory bank stores a first instruction of the [same] set of logically
successive instructions and the second memory bank stores a second instruction of the set [the
same set] of logically successive instructions.
The examiner’s argument that it is “well known” that computer instructions in a program
are inherently in sequential order is not persuasive. What the examiner says is true but it has no
bearing on the instant claim limitations which requires two independently addressable memory
banks, each for storing separate instructions from the same single set of logically successive
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