Appeal No. 2006-1729
Application No. 10/107,628
manner. Therefore, we will sustain the Examiner’s rejection of
claims 1, 6, 11, 15, 22 and 26 under 35 U.S.C. § 102.
II. Under 35 U.S.C. § 102(e), is the Rejection of Claims
22, 24 through 26 and 28 through 34 as Being Anticipated By
Rajski Proper?
With respect to representative claim 22, Appellants argue in
the Appeal and Reply Briefs that the Rajski reference neither
teaches a plurality of outputs nor an X-OR gate that couples each
of the plurality of inputs to the outputs in a different manner.
Now, the question before us is what Rajski would have taught
to one of ordinary skill in the art? To answer this question, we
find the following facts:
At page 2, paragraph 0009, Rajski discloses the
following:
Linear spatial compactors are built of Exclusive-
OR (XOR) or Exclusive-NOR (XNOR) gates to generate n
test outputs from the m primary outputs of the circuit
under test, where n<m. Linear compactors differ from
nonlinear compactors in that the output value of a
linear compactor changes with a change in just one
input to the compactor. With nonlinear compactors, a
change in an input value may go undetected at the
output of the compactor. However, even linear
compactors may mask errors in an integrated circuit.
For example, the basic characteristic an XOR (parity)
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