Appeal No. 2006-2034 Page 2
Application No. 10/744,801
Accordingly, the appellants' invention generates compensation signals based on
characteristic information from both PMOS and NMOS devices. The PMOS and NMOS
devices used to generate the compensation signal are matched to one or more PMOS
and NMOS devices in the IC to be compensated such that the compensation signals
track PVT variations in the circuit. (Id. at 2.)
A further understanding of the invention can be achieved by reading the following
claim.
1 . A compensation circuit, comprising:
a reference circuit including a reference NMOS device and a
reference PMOS device, the reference circuit being operative to generate
a first reference signal and a second reference signal, the first reference
signal being a function of at least one of a process characteristic, a
voltage characteristic and a temperature characteristic of the reference
NMOS device, and the second reference signal being a function of at least
one of a process characteristic, a voltage characteristic and a temperature
characteristic of the reference PMOS device, the reference circuit being
configured to provide the first and second reference signals as separate
and independent outputs; and
a control circuit connected to the reference circuit, the control circuit
being operative to receive the first and second reference signals and to
generate one or more output signals for compensating for a variation in at
least one of a process characteristic, a voltage characteristic and a
temperature characteristic of at least one NMOS device and at least one
PMOS device in a circuit to be compensated, which is connectable to the
control circuit, in response to the first and second reference signals,
respectively.
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Last modified: September 9, 2013