Appeal 2006-3013
Application 10/367,849
Kawaguchi which the Examiner’s rejection cites to, discuss making
connection portions wider to decrease contact resistance and not making
conductive lines on the display wider, as claimed. Nonetheless, we concur
with the Examiner’s underlying finding that it is well-known in the art that
the resistance of a power supply line can be reduced by increasing the width
of the power line. See for example facts 6 through 11, which discuss design
rules/standards for line width on printed circuit boards. Further, we concur
with the Examiner’s statement that there can only be three possible
relationships between the size of the power lines and the data leads, they can
either be the same size, narrower or wider. In our view, a skilled artisan
would choose the width of the power lead based upon the particular
requirements of a given circuit arrangement (e.g., the current load on the
circuit). Thus, we concur with the Examiner’s finding that one skilled in the
art would be motivated to size the lines on the display based upon the
current load on the line.
However, we disagree with the Examiner’s finding that in Dingwall’s
display panel, sizing the line based upon the current would result in the
power line being wider than the data line. The Examiner’s rationale is that
the data lead (COL1) only has the load of the transistor T1, and therefore has
a lower current load than the power lead which has the load of transistor
TR1 and the O-LED. (Answer 4). We disagree with the Examiner’s
finding. The data line also has the load of the reference pixel. (Fact 4).
Further, Dingwall teaches that the pixel drive circuit which is powered by
the power line is a current mirror, i.e. the current mirror caused the current in
the power line to mirror (be the same) as the current in the data line. (Fact
10
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