Appeal 2007-0357
Application 10/180,862
From our view of the Intel reference, there are numbers of other
portions or figures that expand upon the Examiner’s reliance that we
particularly mention here. The basic arrangements in figures 1 and 2 and the
correlated discussion at pages 13 through 15 clearly manifest an attempt of
this reference to be used in a PC which uses a PCI bus and a mother board to
which various devices are connected. We also make reference to figure 9 at
page 26, figure 29 at page 73, figure 33 at page 75, figure 35 at page 80 and
tables 41 through 43 at pages 81 and 82. Appendix C of this reference
begins at page 79 and has an extensive discussion regarding the
connectability of plural CODECs with a single digital controller. In the
multiple CODEC examples, the specific CODEC Id of 00, 01, 10 or 11
permits the digital controller to individually select the respective chips
associated with each of these CODECs. To the extent the claims recite a
sense of directionality to/from an arithmetic unit, this is a part of the prior art
as discussed earlier with respect to the arithmetic units of the attached
computer, the elements associated with the digital controller/bridge of the
prior art and the directionality shown in figures 33 and 35 in Intel as relied
upon by the Examiner.
It is believed that these extensive remarks, in addition to the
Examiner’s extensive Statement of the Rejections and Responsive
Arguments in the Answer, fully address the bulk of the arguments in the
Brief and Reply Brief. As to the rejection under § 102, the Reply Brief’s
remarks appear to improperly invite us to read limitations from the
Specification into the claims on appeal.
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