Appeal 2007-0959
Application 10/082,893
FINDINGS OF FACT
Davis discloses a computer system comprising a host processor 3 that
communicates with I/O processor 5 via primary PCI bus 7. The I/O
processor communicates with the PCI devices 9, 11, and 13 via secondary
PCI bus 15 (Davis, col. 6, ll. 53-58; Fig. 1). PCI device 11 can be an
Ethernet network controller (Davis, col. 7, ll. 4-5). Both the host processor
and I/O processor contain memories (Davis, col. 6, ll. 64-67; col. 7, ll. 7-59;
Fig. 2). Additionally, host processor can configure any public devices on
secondary PCI bus 15 (Davis, col. 14, ll. 24-26).
In one embodiment, private PCI devices can be established. To this
end, Type 1 commands2 received by the primary PCI interface 33 of bridge
29 are converted to Type 0 commands by bridge 20 to configure PCI devices
connected to secondary PCI interface 35 (Davis, col. 7, ll. 60-67; col. 14, l.
27 - col. 15, l. 25).
PRINCIPLES OF LAW
Anticipation is established only when a single prior art reference
discloses, expressly or under the principles of inherency, each and every
element of a claimed invention as well as disclosing structure which is
capable of performing the recited functional limitations. RCA Corp. v.
Applied Digital Data Systems, Inc., 730 F.2d 1440, 1444, 221 USPQ 385,
2 A “Type 1” command is used to pass a configuration request to a target
device on a bus other than the bus where a specific transaction is being run.
A “Type 0” command, however, is used to select a device on the bus where
the transaction is being run and is not propagated beyond the local PCI bus.
See generally PCI Local Bus Specification, Rev. 2.2, at 31.
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Last modified: September 9, 2013