Appeal 2007-0959
Application 10/082,893
388 (Fed. Cir. 1984); W.L. Gore and Associates, Inc. v. Garlock, Inc., 721
F.2d 1540, 1554, 220 USPQ 303, 313 (Fed. Cir. 1983).
ANALYSIS
At the outset, we note that the second limitation recited in independent
claim 1, namely “processing the data without sending the data from the host
memory to an embedded memory associated with an adapter that includes
the Ethernet device” essentially recites a negative limitation. That is, the
scope and breadth of claim 1 is fully met by a method that includes
processing the data transferred from the host memory to an Ethernet device
if the method does not otherwise disclose the negative limitation -- namely
sending the data to an Ethernet adapter’s embedded memory.
With this interpretation, we turn to Davis. First, contrary to
Appellant’s argument, Davis does in fact disclose an Ethernet device: PCI
device 11 can be an Ethernet network controller (Davis, col. 7, ll. 4-5).3
In Davis, host processor 3 communicates with I/O processor 5 via
primary PCI bus 7. The I/O processor in turn communicates with the PCI
3 Although the Examiner cites an additional non-patent document to show
that a PCI device can be an Ethernet device (Answer 5), this additional
reference was not relied upon in the rejection and is not therefore before us.
See In re Hoch, 428, F.2d 1341, 1342 n.3, 166 USPQ 406, 407 n.3 (CCPA
1970) ("Where a reference is relied on to support a rejection, whether or not
in a 'minor capacity,' there would appear to be no excuse for not positively
including the reference in the statement of the rejection.").
Moreover, the Examiner’s reference to this document to show that PCI
devices can be (but not necessarily are) Ethernet devices is not germane to
anticipation, but rather obviousness--an issue not before us on appeal. In
any event, this issue is moot since Davis expressly discloses Ethernet
devices as we indicate in our opinion.
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