Appeal 2007-0959
Application 10/082,893
devices 9, 11, and 13 via secondary PCI bus 15 (Davis, col. 6, ll. 53-58).
Such data communication with the Ethernet device 11 certainly involves
transferring data to the Ethernet device as well as to the other PCI devices
via the primary and secondary PCI buses. Although we find the Examiner’s
assertion that drivers are loaded to the PCI devices problematic essentially
for the reasons noted by Appellant, the PCI devices are nonetheless in data
communication with the processors via the respective PCI buses.
We further note that the scope and breadth of the term “host memory”
does not preclude either the host processor 3 or the I/O processor 5 --
processors that each contain memory.4 Both processors communicate with
-- and therefore transfer data to -- the Ethernet device.
Significantly, Davis is silent whether such processed data transferred
to the Ethernet device noted above is or is not sent to an embedded memory
associated with an adapter that includes the Ethernet device. Indeed, Davis
is silent regarding whether the Ethernet device is associated with an adapter
at all, let alone whether data is sent to an embedded memory associated with
such an adapter. Such silence, however, fully meets the negative limitation
recited in claim 1 given the scope and breadth of the limitation.
In short, Appellant has simply not persuasively rebutted the
Examiner’s prima facie case of anticipation based on the disclosure of
Davis. In this regard, Appellant has provided no evidence on this record to
show that (1) the Ethernet device in Davis necessarily is included within an
adapter associated with an embedded memory, and (2) the processed data
4 See Davis, at col. 6, ll. 64-67 (noting that host processor 3 can contain main
and cache memories); see also Davis, at col. 7, ll. 7-59 and Fig. 2 (detailing
I/O processor 5).
6
Page: Previous 1 2 3 4 5 6 7 8 Next
Last modified: September 9, 2013