Appeal 2007-1754
Application 09/943,599
The Examiner contends that Mann teaches a synchronization marker
in the form of Trace Codes (“TCODES”) in the trace stream where all
TCODEs (except TCODE=0001) are synchronization events (Answer 15).
The Examiner further contends that TCODE # 0001 provides the subsequent
offset information as 15 one bit results for subsequent branching outcomes
offset from the base address (Answer 16). The Examiner adds that Mann’s
TYSNC register is loaded into a counter that counts down and causes
insertion of the synchronization marker (i.e., the TCODES) with the base
program counter address (Answer 19).
We will not sustain the Examiner’s rejection of independent claim 1.
Mann discloses a processor that provides trace synchronization information.
A key feature in Mann’s system is ensuring that program address
information is provided in trace records with sufficient frequency. To this
end, the processor determines whether each trace record includes address
information. Based on this determination, a counter counts each record that
lacks address information.6 When the count of such trace records lacking
address information reaches a predetermined number, the current program
address is provided as a trace entry. As a result, the system ensures that
synchronizing address information is provided periodically even for records
that lack such address information (Mann, Abstract; col. 3, ll. 8-30).
In Mann, an instruction trace record is 20-bits wide and comprises two
primary fields: (1) TCODE (Trace Code)7, and (2) TDATA (Trace Data).
6 Mann indicates that such trace records lacking address information include
conditional branch instructions. These trace records only indicate whether
the branch was taken (Mann, col. 2, l. 66 – col. 3, l. 5; col. 15, ll. 61-66).
7 Eleven different TCODES can be reported. See Table 6 (Mann, col. 13, ll.
28-49).
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