Ex parte PELTZER - Page 9




                Appeal No. 95-2454                                                                                                           
                Application No. 07/396,733                                                                                                   


                invention is not confined to substrates of silicon, to insulation by an SiO -layer and to the filling of the                 
                                                                                            2                                                
                insulating grooves by polycrystalline silicon.”  Frouin, col. 6, lines 48-51.                                                
                        The difference between the process set out in applicant’s claims 14 and 36 and the process                           
                disclosed by Frouin resides in applicant’s use of a combined etchant and oxidation resistant coating, etching                
                partially through the epitaxial layer to form a channel and oxidizing the channel  to completely fill the                    
                depressions with silicon oxide rather than using a filler.                                                                   
                        Murphy also relates to integrated circuits having electrically isolated regions.  In particular, Murphy              
                relates to a technique for filling depressions in epitaxial silicon layers by oxidation.  Murphy, col.  1, lines             
                27-30.  Murphy teaches                                                                                                       
                                 the use of a multirole mask on a semiconductor surface.  In one step the mask                               
                                 protects a portion of the semiconductor surface while the unmasked portions are                             
                                 partially etched away.  In another step the same mask prevents oxidation of the                             
                                 protected portion of the semiconductor surface while the previously etched                                  
                                 portions are oxidized.  Subsequently the mask is removed in a solution which does                           
                                 not attack the oxide or the semiconductor surface.                                                          
                Murphy, col.  2, lines 53-61.  Thus, Murphy teaches the use of a single mask to both etch the desired                        
                regions in the epitaxial layer and to form the oxide insulation. Silicon nitride is taught as a suitable mask                
                material having the characteristics of being unaffected during the etching of the epitaxial silicon and masks                
                the diffusion of oxygen during the oxidation step.  Murphy, col.  2, line 68 - col. 3, line 8; col. 3, lines 41-             
                46.   Murphy discloses that during the oxidation step approximately 440 angstroms of silicon is consumed                     
                for every 1000 angstroms of silicon oxide formed.  Murphy, col.  2, lines 62-65.  Murphy teaches that the                    
                epitaxial layer is etched to a predetermined depth so that during oxidation (1) the oxide extends through                    
                the epitaxial layer and (2) the depression is filled with oxide restoring a substantially planar surface to the              
                device.  Murphy, col. 3, lines 15-21.                                                                                        
                        Doo relates to integrated circuits electrically isolated by oxide channels.  Doo, col.  1, lines 10-26.              
                The oxide filled channels are depicted in Doo’s Figures 1 and 6 (element 6).  The oxide is preferably silicon                

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