Appeal No. 95-4957
Application 07/950,979
The first difference between claim 1 and Kronstadt argued
by appellants is the claimed plurality of system memory data
busses. According to appellants, Kronstadt discloses a memory
with only a single data bus [reply brief, page 3]. The examiner
argues that system busses are not typically the connections to
the memory chips, and the claimed recitation would be an inherent
property in Kronstadt in any case [supplemental answer, page 8].
The examiner also asserts that the claimed plurality of system
memory data busses is functionally equivalent to the system data
bus of Kronstadt [supplemental answer, page 9]. We agree with
appellants on this point.
The busses of claim 1 are not recited simply as system
busses, but rather, as system memory data busses. Thus, the
busses of claim 1 must be distinguished from busses used for
address or control information. The data in appellants’ FIG. 3
is latched from a plurality of data busses [busses 342, 344, 346
and 348]. The data in Kronstadt is shown as being sent on a
single data bus and it is the address information which routes
this single bus of data. There is simply no suggestion in
Kronstadt that the system memory includes a plurality of system
data busses, and the examiner’s contention that this feature is
inherently present in Kronstadt is not only unsupported by the
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