Appeal No. 95-4957
Application 07/950,979
record in this case but appears to be an erroneous finding as
well. The only plural data busses in Kronstadt are those busses
between the memory banks 16 and the d-cache 24. These busses,
however, would not be considered system data busses as used in
the claim because they are internal to the external memory.
Additionally, whether the single data bus of Kronstadt functions
equivalently to the claimed plurality of system data busses is
not a valid basis per se to assert obviousness. Thus, the
examiner’s finding that Kronstadt teaches the claimed plurality
of system memory data busses is not supported by the record in
this case.
Appellants also argue that Kronstadt does not teach the
claimed plurality of bidirectional latching transceivers as
recited in claim 1. According to appellants, Kronstadt teaches
only a single latch [26] as shown in FIG. 4. The examiner argues
that the latch of Kronstadt is “equivalent to the connectivity of
element 32 [sic] of Figure 3 of the present invention”
[supplemental answer, page 10]. The examiner also asserts that
individually associated latches would be inherently present in
Kronstadt. We agree with appellants for basically the same
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