Ex parte KREIN et al. - Page 2




          Appeal No. 95-5030                                                          
          Application 07/815,694                                                      


          Sakon et al. (Sakon)     1-246664            Oct.  2, 1989                  
          (Japanese Kokai)                                                            
                              The Rejections on Appeal                                
               Claims 1-30 stand rejected under 35 U.S.C. § 102(b) as being           
          anticipated by Sakon.  This rejection was first entered in the              
          examiner's answer (Paper No. 11).                                           
               Claims 1-29 stand rejected under 35 U.S.C. § 103 as being              
          unpatentable over Fava and Miro (Paper No. 5).                              
               We assume that claim 30 also stands finally rejected under             
          35 U.S.C. § 103 as being unpatentable over Fava and Miro.                   
          Although the cover page of the final rejection identified only              
          claims 1-29 as having been rejected, the markings on the file               
          jacket indicate that claim 30 has also been rejected.  The appeal           
          brief also regards claim 30 as having been rejected.                        

                                    The Invention                                     
               This invention relates to computer interconnect circuitry.             
          In particular, the order of data transmission through the                   
          interconnect circuitry is maintained.  Claims 1, 17 and 25 are              
          the sole independent claims, of which, claim 25 appears to be the           
          broadest and reads as follows:                                              

                    25.  A method for controlling transmission of                     
          information in a computer interconnect controlled by a control              

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