Appeal No. 96-0113 Application 07/848,779 except the simultaneous function have been conceded by the appellant, the several findings made by the examiner as to the "simultaneous generation" feature for the correlated bit patterns are erroneous. In the answer at 6, the examiner stated: Sullivan et al further disclose at column 6 lines 6-11 that "A computer program, written in the fortran program language, for performing the above steps is included in Appendix A. This program was executed on a CRAYII TM super computer to produce a set of 256 minimum visual noise binary bit patterns, corresponding to 256 density levels." Sullivan et al clear[ly] disclose the "simultaneously" function as recited in the claims. Furthermore, on page 7 of the answer, the examiner stated: The prior art Sullivan et al '501 show in figures 3, 6, and 8 the simultaneously function as relied by the appellant. Sullivan et al '501 also disclose the use of CRAYII TM super computer to produce a set of 256 minimum visual noise binary patterns, which is the same as the super computer as disclosed by the appellant. Accordingly, the claims are not patentable over Sullivan et al '501. The appellant is correct that the examiner's reading of the figures of Sullivan '501 is wrong and that the examiner has confused generation of the stored bit patterns with the making use of those stored bit patterns to generate a halftone image. As is correctly noted by the appellant in the reply brief at 2: Figures 6 and 8 show the halftone image processing technique using the halftone bit patterns, they do not show the bit patterns being generated simultaneously (Figure 3 is a graph showing the human visual response function). As described at Col. 6, line 33, the -13-Page: Previous 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 NextLast modified: November 3, 2007