Ex parte KATO et al. - Page 3




          Appeal No. 96-0950                                                          
          Application No. 07/727,932                                                  


          The rejections                                                              
               The Examiner’s Answer lists the following prior art as                 
          relied upon in the rejection:                                               
          Quinquis                      4,467,418           Aug. 21, 1984             
          Katzman et al. (Katzman)      4,228,496           Oct. 14, 1980             
               Claims 1-7 and 9-14 stand rejected under 35 U.S.C.  103 as            
          unpatentable over Quinquis and Katzman.  Examiner’s Answer at 3.            
          The invention                                                               
               The claimed invention relates to a system for gathering                
          and/or scattering data among a number of processors in a parallel           
          processor computer.  A gathering system collects data scattered             
          among many processors into one processor.  A scattering system              
          distributes data from one processor to other processors.                    
          Specification at 1, lines 6-14.                                             
               As shown in Figure 6, the gathering system includes a bus L,           
          a reception processor P0, an AND gate GA1, and transmitting                 
          processors P1, P2, and P3.  Each transmitting processor P(n)                
          includes a transmission buffer F(n) and a transfer control                  
          circuit U(n).  Specification at 12, lines 23-36.                            
               The transfer control circuit consults prestored values to              
          determine an order of transfer for data in its own processor in             
          relation to data in other processors.  Different but coordinated            

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