Appeal No. 97-0707
Application No. 08/001,474
order to activate said key address; and
a memory element corresponding to each key address for
storing said address associative information; wherein each memory
element includes a plurality of multiple bit binary counters,
each multiple bit binary counter corresponding to a separate bit
position of information stored at each key address.
17. A method of storing and recalling information,
comprising the steps of:
defining an address space within a memory chip;
randomly generating key addresses within said address space;
selecting a radius of capture for each key address;
partitioning said address space such that a hypersphere
defined by said radius of capture of any key address does not
overlap a hypersphere defined by said radius of capture of any
other key address;
receiving address associative information;
activating a key address having said address associative
information, said address associative information activating at
most one key address within said memory chip;
storing said address associative information at said
activated key address in response to a write command;
transmitting an output from said activated key address in
response to a read command, said output having bit positions
corresponding to said address associative information; and
summing said bit positions of said output for each activated
key address on multiple memory chips to determine a result for
each bit position.
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