Appeal No. 95-1816
Application 07/859,347
The invention relates to a low voltage, high frequency
electronic processing device.
The independent claim 17 is reproduced as follows:
17. A processor capable of operating at a high clock rate
with reduced operating voltage comprising:
(a) core circuitry that executes instructions;
(b) bus control circuitry operable to transfer
instructions and data between the processor and an
external memory;
(c) memory management circuitry operable to
transfer instructions and data between the core
circuitry and the external memory;
(d) clock generation circuitry, coupled to the
core circuitry, the memory management circuitry,
and the bus control circuitry, for generating at
least one clock signal; and
(e) a plurality of sense amplifiers included in at
least one of the core circuitry, the memory
management circuitry, the bus control circuitry,
and the clock generation circuitry, the plurality
of sense amplifiers operable to compress logic
thresholds to increase logic switching speed.
The Examiner relies on the following reference:
Ito et al. (Ito) 5,079,745 Jan. 07, 1992
Claims 17 through 24, 26 and 27 stand rejected under 35
U.S.C. § 103 as being unpatentable over Ito.
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