Appeal No. 97-4091
Application 08/382,701
device regions and having a resistivity less than about 2.5
microhm-centimeters; and (3) an amorphous silicon carbide layer
covering the metal wiring.
Claim 15 recites a wiring board comprising a subassembly
containing thereon metal wiring having a resistivity less than
about 2.5 microhm-centimeters, and an amorphous silicon carbide
layer covering the metal wiring.
Claims 1 and 15 further recite a dielectric layer covering
the silicon carbide layer. Claim 11 adds a second layer of metal
wiring formed on the amorphous silicon carbide layer and
electrically connected to the first layer of metal wiring.
Claims 1, 11 and 15 are reproduced below:
1. An integrated circuit comprising:
A) a circuit subassembly comprising a semiconductor
substrate having solid state device regions and, deposed on the
surface of the semiconductor substrate, metal wiring
interconnecting the solid state device regions, the metal wiring
having a resistivity less than about 2.5 microhm-centimeters;
B) an amorphous silicon carbide layer covering at least the
metal wiring; and
C) a dielectric layer covering at least the silicon carbide
layer.
11. An integrated circuit comprising:
A) a circuit subassembly comprising a semiconductor
substrate having solid state device regions and, deposed on
the surface of the semiconductor substrate, metal wiring
3
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Last modified: November 3, 2007