Appeal No. 96-0862
Application 08/055,971
The invention is directed to a micro-code sequencer.
More specifically, the present invention provides for a micro-
code sequencer in which fewer clock cycles are wasted upon
execution of branch conditions by employing two ports for
outputting both a branch-taken and a branch-not-taken micro-
code vector in parallel so that the logic unit processing the
micro-code vectors has immediate access to the appropriate
micro-code vector regardless of whether the branch is taken or
not.
Representative independent claim 1 is reproduced as
follows:
1. A device for processing micro-code, comprising:
micro-code means for providing sequences of micro-code
vectors, said sequences of micro-code vectors including branch
condition micro-code vectors, branch-taken micro-code vectors
and corresponding branch-not-taken micro-code vectors, with
each branch-taken micro-code vector and corresponding branch-
not-taken micro-code vector sharing a common micro-address;
output means for outputting micro-code vectors from said
micro-code means, with a branch-taken micro-code vector and a
corresponding branch-not-taken micro-code vector being output
substantially in parallel;
micro-code vector selection means, connected to said
output means, for selecting between said branch-taken micro-
code vector and said corresponding branch-not-taken micro-code
vector;
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Last modified: November 3, 2007