Appeal No. 96-0862
Application 08/055,971
Furthermore, each independent claim specifically recites
that the micro-code vectors to be output from the output means
are selected “without retrieving stored addresses in said
branch condition micro-vectors” [claim 12 omits “branch”].
This limitation permits the wasting of fewer clock cycles over
the prior art. Yet, the examiner never satisfactorily
explains how Keller suggests this limitation.
While appellant points out many differences between the
instant claimed invention and the prior art mentioned in the
specification, as well as Keller, [see, for example, the
supplemental reply brief, pages 2-5], concluding, at page 5,
that
[n]either Keller nor the prior art described in
the specification teach [sic, teaches] or
suggest [sic, suggests] a micro-code vector
address selection means comprising a pointer for
identifying a micro-vector to be output and a
plus one adder for incrementing an address
stored in the point [sic, pointer] on each clock
cycle such that the micro-code vector address
selection means selects a next sequentially
stored micro-code vector from the micro code
means after selecting branch condition vectors,
the examiner’s response is merely to contend that the
incrementing by one is “well-known in the art” [second
supplemental answer, page 3] and that the selection of a
-6-
Page: Previous 1 2 3 4 5 6 7 8 9 Next
Last modified: November 3, 2007