Appeal No. 96-0862
Application 08/055,971
generated by incrementing the current microaddress by one,
such storage in sequential order “is well known” [supplemental
answer, page 3]. The examiner then concludes that it would
have been obvious to apply “the implicit next address in
Keller’s control store to generate next non-branch
microaddress by incrementing the current microaddress by one”
[supplemental answer, page 4]. While the examiner alleges
that a certain storage technique is “well known,” the examiner
has provided no such evidence. Moreover, it is unclear what
claim limitation is alleged to be “well known.”
The claims deal with micro-code vector selection means, micro-
code vectors and micro-code vector address selection means
wherein the latter comprises “a pointer for identifying said
micro-vectors to be output and a plus one adder for
incrementing addresses stored in said pointer on each clock
cycle” so that the selection of the next sequentially stored
micro-code vectors is performed “after selecting branch
condition micro-vectors.” The examiner has not pointed out
how such limitations are seen to be disclosed or suggested by
Keller.
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Last modified: November 3, 2007