Appeal No. 96-0908
Application 08/160,118
(5) Claims 7 and 19
(6) Claims 40 and 42
Claims 7 and 19 require that the "status register stores
a plurality of different types of status bits." Auslander
discloses a plurality of different types of status bits.
Kawata discloses only a sign bit and does not disclose a
plurality of different types of status bits; however, as
discussed supra, it was well known in the prior art to have a
status register for a plurality of different types of status
bits.
Claims 7 and 19 further require that "said register pair
conditional store instruction includes a plurality of bits
designating whether particular ones of said plurality of
different types of status bits are protected from being set
corresponding to said output of said arithmetic logic unit."
Appellants argue (Br10): "Note that the quoted claim language
clearly indicates that it is the particular bits of the
current instruction that determines the status bit protection
and not the instruction type as suggested in the rejection.
The Appellants respectfully submit that Auslander et al does
[sic, do not] teach or suggest that the instruction includes
bits that determine whether a status bit is protected from
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