Appeal No. 96-1075
Application 08/041,737
Thus, the isolation film 3 of Sunami, although covering only
part of the surface of the semiconductor, is considered to
meet the limitation of "a barrier layer resistant to
diffusion of dopants and traps on top of said semiconductor
region" as recited in claim 52 and the layer and means
limitations in the last subparagraph of claims 61, 66, 71,
and 76. Sunami does not, however, disclose an insulating
substrate.
Obviousness
The Examiner concludes (EA8):
It would have at the very least been obvious to
one skilled in this art to form the active
semiconductor layer 108 or 124 of Calviello et al. on a
buffer layer 106 or 116 prior to the formation of the
high temperature superconductor (HTS) layer 110 or 120
of Calviello et al. on a buffer layer 106 or 118 as
shown by Aoki et al. so that a SiO film would cover the
2
active semiconductor layer 108 or 124 and to utilize a
barrier layer made of Si N on the SiO film or directly3 4 2
on the active semiconductor layer 108 or 124 to prevent
diffusion of the constituents of the high temperature
(HTS) layer 110 or 120 and to prevent the deterioration
of the electrical characteristics of the semiconductor
layer 108 or 124 as taught by Sunami et al.
As we understand the rejection, the Examiner proposes
to modify Calviello by three steps: (1) interchanging the
order of depositing the superconductor 120 and the
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